The present application relates generally to an improved data processing apparatus and method and more specifically to mechanisms for providing and utilizing range check based lookup table structures in a data processing system.
Division, reciprocal, square root, approximations, and other arithmetic operations are used in critical applications and impact the performance of a data processing unit. This is especially true of integer divisions which are relevant in the JAVA, C++, and Oracle programming languages. Integer division is typically used for fast hashing in many current software routines.
A predominant and fast divide algorithm currently available is SRT based division (named for its creators, Sweeney, Robertson, and Tocher). SRT division is a popular method for division in many microprocessor implementations. SRT division is similar to non-restoring division, but SRT division uses a lookup table based on the dividend and the divisor to determine each quotient digit. The SRT division algorithm is an adequate algorithm for fast division operations, but requires a very large lookup table (LUT), and thus a large chip area, which constrains or limits the speed of the chip design. For high frequency processors, such as the IBM z-Series and POWER series chip designs, available from International Business Machines Corporation of Armonk, N.Y., a standard SRT algorithm is not a suitable solution because the time required to access the large LUT results in a hardware solution that does not meet the specified target cycle time for the processor